CamSim Camera/Machine Simulator

The Gidel CamSim™ is a flexible high-performance camera simulator that generates a camera link video stream and test patterns for testing frame grabbers or vision/imaging systems. The system supports all Camera Link™ specification v2.0 configurations and can be customized for any user-defined camera protocol and interface.

 

The CamSim enables most development to be done in a low-cost lab environment. Thus, the CamSim significantly improves productivity and reduces the overall expense of developing vision and imaging systems. Gidel’s CamSim data flow repetition capability ensures that algorithms are validated and work as expected with pertinent input. Moreover, once the rare bug is detected, its respective data flow can be accurately reconstructed to locate the bug and quickly fix it.

 

The CamSim suite includes:

  • Application Software: An intuitive GUI enabling full control of the image simulation, including: transmitting image from user files or from the pattern generator files, configuring the camera link parameters, defining signal timing, and displaying images transmitted.
  • API Methods: A set of CamSim API methods that can be used to develop a customized user application. The API methods run on both Windows and Linux.
  • Gidel PCIe Board: A PCIe FPGA board incorporating Gidel CamSim firmware for transmitting the image data.

Ordering Information

International:
Phone: +972 4 610 2500
Fax: +972 4 610 2501

North America:
Phone: +1 408 969 0389
Fax: +1 408 465 7361

  • Simulates all camera link v2.0 configurations (base / medium / full/80-bit (DECA))
  • Supplies machine simulator capability by adding user IOs
  • Supports BMP and RAW input image files
  • Pattern generator for transmitting color and grayscale test patterns
  • Fully programmable image timing and data parameter configuration via user-friendly GUI
  • API methods for developing user simulator applications
  • User-configurable Camera Control (CC) lines for triggering options
  • Throughput capabilities of 1-10 pixels simultaneously at 7,000-85,000 KHz. Pixel bit depth varies from 8 to 36 bits per pixel
  • Software and FPGA customization for extended machine simulation and/or custom logic/processes
  • Up to 16 GB image buffer
  • Two MDR-26 connectors for simulating all camera link modes or for simulating two base mode cameras
CamSim system block diagram
CamSim System Overview
CamSim System Overview
  • Vision Algorithms Development
  • Image Processing Application Testing
  • Machine Vision Integration
  • Vision System Reliability Testing
  • Debugging the Rare Bug
FeatureSpecification
Camera Link Modes1 80-bit (Deca), full, medium or base camera link or 2 base camera links with option for PoCL
Pixel ClockUp to 85 MHz
Image FormatsMono, Bayer, RGBA (8, 10, 12, 14, and 16 bits/color) and RGB (8, 10, and 12 bits/color)
Max Number of Taps10 taps/8-bits, 8 taps/10-bits
Camera TypesArea and Line
Host ThroughputUp to 64 Gb/s
Frame Buffer1-16 GB
Board Form FactorPCIe low-profile
MTBF> million hours
GPIORS422, opto-coupler, LVTTL and 30V at 0.9A
Software SupportCamSim GUI, API, and examples. For open FPGA grabber version enabling customization, ProcWizard development tool
OS SupportWin 10 and Server 2012 (64-bit) and Linux (kernel 2.6.x-3.10.x). Linux version doesn’t support GUI, only API
ModelsOutputsPixel ClockHost BusImage BufferFeatures
CamSim-ASingle base/ medium/ full/80bit (DECA)up to 85 MHzPCIe x8 Gen. 38 or 16 GBUses HawkEye-CL board with Arria 10 FPGA for simulating camera link and optional machine simulation. Includes: CamSim-A Light application GUI, API and IP, FPGA template, and Gidel Proc Developer's Kit.
CamSim-A LightSingle base/ medium/ full/80bit (DECA)up to 85 MHzPCIe x8 Gen. 38 or 16 GBUses HawkEye-CL board with Arria 10 FPGA for simulating camera link and optional machine simulation. Includes: CamSim-A Light application GUI and API.
Download our data sheet for the CamSim Camera Simulator.