High-end frame grabber manufacturer delivers new line featuring 8 links of cXp12, lossless and JPEG encoders at 500+ MPixels/second, and the ability to support customized FPGA ISP....
VISION 2018, Stuttgart, Germany, 6 November, 2018 – Gidel, a technology leader in cutting-edge Vision and Imaging solutions based on FPGAs, today announced a new JPEG compression IP with real-time processing capability, low latency, and compact FPGA resource utilization. Gidel’s JPEG compression IP has the highest throughput ratio available, combined with very low resource utilization, making it extremely compact despite its...
Santa Clara, California, and Or-Akiva, Israel, 21 June, 2018 – Gidel, a technology leader in high performance accelerators utilizing FPGAs, today announced a new compression IP and a renewed focus on compression and encryption algorithms for the HPC and Vision markets. The compression algorithm requires extremely low power, encoding more than 1 GB/sec utilizing just 1% of the FPGA, thus opening up new possibilities...
Gidel today announced the availability of development tools that take advantage of Intel's newly-released HLS, producing a speed increase of 5x or greater over other development options....
Today Gidel launched their latest product line, the Proc10S. The Proc10S is part of the Proc family of high performance, scalable compute acceleration boards, but is based on the Stratix 10 FPGA, which was released by Intel in late 2016. ...