The Proc1C10M™ system is a flexible, ultra-high performance FPGA computation accelerator based on Intel’s powerful Stratix 10 MX FPGA. The Proc1C10M architecture combines ultra fast embedded HBM memory with huge I/O bandwidth of up to 400 Gb/s.
With 16 x 25 Gb/s full-duplex transceivers and vast ultra fast memory resources, the Proc1C10M offers tremendous data bandwidth with exceptional real-time processing capabilities ideal for low latency, high performance HPC, storage, networking, and high-end imaging applications. A multi-level memory scheme provides strong infrastructure for diverse processing needs. The memory ecosystem includes embedded MLABs and M20K, closely-coupled HBM and eSRAM, and up to 128 GB DDR4.
The half-length PCIe boards has a Gen.3 x16 host interface, 4 x QSFP28, a Gidel PHS connector for mounting daughterboards, and 19 x GPIOs for peripheral system control. The PHS offers up to 128 Gb/s Rx/Tx enabling, for example, to connect 8x CoaXPress-12 cameras via a Gidel CXP daughterboard.
The Proc1C10M is supported by Gidel’s innovative development tools, and enables high productivity based on C and HDL designs.
Target applications:
System specifications:
2100K logic elements
HBM
Embedded 18x19 multipliers
Embedded M20K and MLAB blocks
16 x 26 Gb/s transceivers
7,920 embedded 18x19 multipliers
134 Gb embedded M20K and 11 Gb MLAB blocks
2,073,000 LEs
7,920 18 x19 MAC
Temperature monitoring
Internal voltage monitoring
Connectivity:
Development tools:
Generation of environment FPGA code, including all board/IP constrains and user logic wrapper
Generation of dedicated application driver supported by API
Splitting of physical on-board memories into logical memories with independent parallel access to/from user logic
The Proc1C10M™ system is based on the Proc10M module mounted on the Gidel Proc1C carrier board.
For additional Proc10M carrier board options models, including options that utilize the Proc10M’s full resources, contact the Gidel Sales.
Options:
The Proc1C10M is supported by Gidel’s innovative development tools, and enables high productivity based on C and HDL designs.
- Gidel ProcDev Kit for HDL design flow:
- Generation of environment FPGA code, including all board/IP constrains and user logic wrapper
- Generation of dedicated application driver with API support
- Splitting of physical on-board memories into logical memories with independent parallel access
to/from user logic
- Intel Tools: Quartus Prime Pro, including QSys and DSP builder
