Gidel at IMVC 2025

IMVC 2025: Gidel Demonstrated FPGA Imaging and Edge AI

At IMVC 2025, Gidel demonstrated FPGA-based technologies for high-performance imaging, real-time processing, Edge AI, and machine vision applications.

The demonstrations highlighted how FPGA-based acquisition and image processing work with high-bandwidth camera interfaces and AI computing. This architecture supports demanding inspection, automation, robotics, and embedded vision systems.

Real-Time CoaXPress-12 Acquisition and FPGA Processing

One of the live demonstrations featured the HawkEye-CXP12 with four CoaXPress-12 links and real-time FPGA-based image processing using an Altera Arria 10 FPGA.

The FPGA handled deterministic image acquisition, HDR, image enhancement, and Quality+ Compression within the real-time processing pipeline.

By performing these pixel-intensive functions directly on the FPGA, the architecture can reduce CPU/GPU processing overhead while maintaining predictable low-latency operation.

Engineers evaluating CoaXPress camera selection can also review Gidel’s guide to CoaXPress cameras to compare bandwidth, link count, cabling, synchronization, and acquisition requirements.

FPGA Imaging for High-Bandwidth Machine Vision

Gidel’s FPGA platforms support demanding imaging systems that require high data rates, deterministic acquisition, and real-time processing.

Supported machine vision interfaces include:

• CoaXPress frame grabbers for very high-bandwidth acquisition, including CXP-12
• GigE Vision frame grabbers for flexible Ethernet-based high-bandwidth imaging
• Camera Link frame grabbers for deterministic acquisition with established industrial camera interfaces
• Custom sensor and imaging interfaces for specialized system requirements

These FPGA-based acquisition platforms combine camera interfacing, protocol processing, synchronization, image enhancement, and compression. They can also perform data preparation within the same processing architecture.

Real-Time HDR and Image Compression

Gidel also demonstrated FPGA-based image enhancement and data-reduction technologies.

Real-Time HDR improves visibility across challenging lighting conditions while operating within the FPGA processing pipeline.

Quality+ Compression reduces image data volume while maintaining high image quality, helping reduce bandwidth and storage requirements in high-resolution and high-frame-rate imaging systems.

These capabilities are particularly relevant to inspection, metrology, robotics, semiconductor, medical imaging, and other applications where large image volumes must be processed continuously.

FPGA Vision Development and Validation

A second demonstration highlighted Gidel’s FPGA imaging and vision IP development capabilities for real-time processing, testing, and validation.

The platform enables developers to integrate custom FPGA processing pipelines alongside image acquisition, allowing algorithms and imaging functions to be implemented directly in hardware when deterministic timing, high throughput, or low latency are required.

This approach supports development of advanced imaging pipelines for machine vision, Edge AI, inspection, and other high-performance vision applications.

Explore Gidel Machine Vision Solutions

• Gidel PCIe Frame Grabbers
• Real-Time HDR IP
• Quality+ Compression
• FantoVision Edge AI Systems

IMVC 2025 Event Details

📆 Tuesday, April 1, 2025
📌 Pavilion 10, EXPO Tel Aviv
📌 Main Hall, Booth 7

IMVC 2025 brought together professionals from computer vision, image processing, AI, machine learning, embedded vision, robotics, medical imaging, metrology, and other related fields.

Gidel participated with demonstrations of FPGA-based image acquisition, real-time processing, HDR, compression, and advanced imaging development.

Official event website: IMVC 2025