HawkEye: Low Power Accelerator Board
The HawkEye™ is a low-profile, low power accelerator board built on Altera Arria 10 GX FPGA technology. Designed for compact, power-sensitive environments, it combines robust computational performance with exceptional energy efficiency. The HawkEye delivers up to 480K logic elements (LEs), IEEE-compliant floating-point capability, and peak data transfer rates of 28 Gb/s through 2 × SFP+ links. With its PCIe Gen3 x8 host interface and on-board memory up to 18 GB DDR4, the HawkEye provides a powerful yet efficient solution for modern embedded and industrial computing applications.
Performance and Memory
The HawkEye integrates 1–2 GB DDR4, embedded SRAM, and up to 16 GB DDR4 SoDIMM (for larger FPGA devices), supporting 48 parallel memory ports for maximum bandwidth utilization. As a result, it offers high-throughput data handling and low-latency operation while maintaining exceptional power efficiency, starting at less than 12 W.
Connectivity and Expansion Options
The HawkEye features 2 SFP+ links providing up to 28 Gb/s, alongside a variety of I/O options including RS422, Opto-coupler, external clock, LVDS, LVTTL (3V), and 30V/0.9A output. Furthermore, the platform can operate either as a PCIe-based compute accelerator or in stand-alone mode, delivering flexibility for diverse deployment scenarios. Consequently, it is ideal for applications demanding reliability and low power in a compact footprint.
Optional SoC Capability
The HawkEye family also includes an SoC variant with a dual-core ARM processor based on Arria® 10 GX devices. In addition, a MicroSD slot supports large program images for fully stand-alone operation, enhancing versatility in embedded use cases.
Development Tools and Reliability
Supported by Gidel’s advanced development suite, the HawkEye low power accelerator board simplifies system integration and accelerates deployment. Moreover, the platform has been engineered for high reliability with an MTBF exceeding 1 million hours, ensuring long-term dependability in mission-critical environments.
Why Choose the HawkEye Accelerator Board?
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Altera Arria® 10 FPGA with up to 480K logic elements
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Under 12 W power consumption for energy-efficient performance
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Up to 18 GB DDR4 memory with 48 parallel ports
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28 Gb/s connectivity via dual SFP+ and PCIe Gen3 x8
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SoC variant with dual-core ARM processor and stand-alone operation
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High reliability with MTBF beyond 1 million hours
For more accelerator card options, visit FPGA Compute Acceleration – Gidel
Target applications
General
- Embedded MLAB (640 bits each) SRAM blocks
- Embedded M20K (20K-bit) SRAM blocks
- Up to 16 GB DDR4 SDRAM (SoDIMM)
- On-board 1 GB DDR4 SDRAM
- Up to 2 GB DDR4 SDRAM for a total of 5.6 GB/s
- Up to 16 GB DDR4 SDRAM for a total of 10.8 GB/s
- Up to 2,736 Embedded 18x19 multipliers
- Up to 2× 12.5/14.1 Gb/s transceivers
- 1.6 Gb/s LVDS performance
- Flexible clocking system
- Temperature monitoring
Optional: low profile
- 1.7M hours
- HE 20G > 350K hours
Connectivity
- 4 X RS422 INPUTS
- Optional input clk
- 1x Optocoupler input
- 1 X RS422 INPUTS
- 2x Opto-coupler inputs
- 2X 3-30V @ 0.8A outputs
- LVTTL IO
- 12V/1A power supply
- 12x LVTTL IO (5V TTL tolerant)
Environmental conditions
- Continuous Operation: 10 - 80% (non-condensing)
- Peak Operation: 10 - 90% (non-condensing)
Development tools
- Generation of FPGA environment code, including all board/IP constraints and a user-logic wrapper
- Generation of a dedicated application driver with an API
- Splitting physical on-board memories into logical memories, each with independent, parallel access to/from user logic
The HawkEye FPGA accelerators is highly flexible and available with various FPGA and connector options.
For additional HawkEye models, including SoC, and other FPGA speed grades, contact Gidel.
HawkEye Accelerator Card: FPGA resources comparison
| Resources | HawkEye-16 Series | HawkEye-48 Series |
|---|---|---|
| FPGA | ||
| FPGA-ALM | ||
| FPGA-M20K | ||
| FPGA-18*19 Multipliers | ||
| Peripheral Memory: | ||
Development Tools
For HDL Design Flow
- Generation of environment FPGA code, including all board/IP constrains and user logic wrapper
- Generation of dedicated application driver with API support
- Splitting of physical on-board memories into logical memories with independent parallel access to/from user logic
- Altera Tools: Quartus Prime Pro, including QSys and DSP builder
