Proc10A PCIe x8 (Gen. 3) FPGA Computation Accelerators
The Proc10A™ system is a flexible, high performance, low-power FPGA platform based on Altera’s powerful Arria 10 FPGA. The Proc10A’s unique architecture balances high performance and flexibility to meet demanding and versatile HPC requirements.
With up to fifteen 14.2 Gb/s full-duplex transceivers and vast memory resources, the Proc10A offers tremendous I/O throughput along with powerful on-board processing and data management capabilities ideal for low latency, high performance HPC, storage, networking, and high-end imaging applications. A multi-level memory scheme includes up to 32 GB DDR3 ECC SODIMM, on-board 1 GB DDR3 SDRAM, dedicated FPGA memory blocks (M20K and MLABs), and other memory options.
In addition, the Proc10A hosts an 8-lane PCI Express Gen. 3 bridge that enables strong co-processing between the host CPU and the FPGA accelerator. For tightly-coupled FPGA and CPU processing, Gidel offers the Proc10A SoC family, with an embedded ARM processor based on the Arria 10 SoC FPGAs.
The Proc10A is supported by HLS and Gidel’s innovative development tools, and enables high productivity based on C and HDL designs.
Contact Information
North America:
+1 408 969 0389
EMEA:
+972 4 610 2500
Asia Pacific:
+972 4 610 2500
- Altera Arria 10 FPGA (GX, SX) 1150 and 660
- PCIe x8 Gen. 3 Express or stand-alone
- Up to 15×14.2 Gb/s reconfigurable transceivers supporting multiple protocols and data rates
- Form factor: PCIe half length
- Up to 40 GFLOPS per Watt
- 1x QSFP, 3x QSFP+, and Gidel high-speed connectors (PHS)
- Multi-level memory structure (18+ GB) with sustained throughput of 10+ TB/s for internal memories and ~16 GB/s for on-board memory as follows:
- Enhanced MLAB (640-bit) SRAM blocks
- Up to 2,713 M20K (20K-bit) SRAM blocks (53 Mb) at a typical throughput of 10 TB/s at 450 MHz
- 1 GB DDR3 on-board memory at a maximum sustained throughput of 4.5 GB/s
- 2×16 GB DDR3 SoDIMM Banks for maximum sustained throughput of 17 GB/s
- On-board user flash (optional)
- Typical system frequency: 150-450 MHz
- Flexible clocking system
- Low power (8-70W)
- Supported by Gidel’s HLS (I++) ASP based on Intel’s SDK
- Supported by Gidel’s Developer’s Kit
- Simultaneous acceleration of multiple applications or processes
- Unmatched HDL design productivity
- Simple integration with software applications
- DSP (Digital Signal Processing) and HPRC (High Performance Reconfigurable Computing)
- High-speed, Low-latency Networking and Network Analysis
- Life Science Applications
- Linear Algebra and 3D Applications
- Computational Finance and HFT
- Data Analytics
- Deep Packet Inspection
- Surveillance, Machine Vision, and Imaging
- High Performance Acquisition Systems
| Feature | Specification |
|---|---|
| FPGA | • Intel Arria 10 GX • 1150K and 660K logic elements • Embedded 18x19 multipliers • Embedded M20K and MLAB blocks • Up to 15x 14.1 Gb/s transceivers • 1.6 Gb/s LVDS performance |
| Memory | • 1.6 MB embedded MLAB (640-bit) SRAM blocks • 6.75 MB embedded M20K (20K-bit) SRAM blocks • Up to 32 GB DDR3 SDRAM (2x SoDIMMs) • On-board 2 GB DDR3 SDRAM |
| Processing Performance | • Up to 2,713 M20K blocks @ 450 MT/s for total of ~5 TB/s • DDR3 SDRAM for total at 4.5 GB/s • DDR3 SDRAM for a total at 17 GB/s • Up to 3,036 18x19 variable precision multipliers |
| MTBF | > 1.5 million hours |
| Form Factor | PCIe half length |
| Host Interface | PCIe x8 Gen. 3 |
| I/O | 3x SFP+, QSFP+ and 2x PHS (Gidel High Speed Connector) |
| GPIO | 12x LVTTL |
| Board Management | • Flexible clocking system • Temperature monitoring • Internal voltage monitoring |
| Development Tools | • OpenCL BSP based on Intel’s SDK • HLS ASP for use with Intel’s HLS compiler • Gidel ProcDev Kit for HDL design flow: o Generation of dedicated application driver o Splitting of physical on-board memories into logical memories with independent parallel access to/from user logic o Generation of environment FPGA code, including all board/IP constrains and user logic wrapper • Intel Tools: Quartus Prime Pro, including QSys and DSP builder |
| Acceleration Board | FPGA Devices | Speed Grade | Number of FPGAs | On-Board Memory | Notes |
|---|---|---|---|---|---|
| Proc10AX066-B | Arria 10 660 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | Without connectors |
| Proc10AX066-BS | Arria 10 660 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+ connector |
| Proc10AX066-BF | Arria 10 660 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+, QSFP+ and PHS (Gidel High Speed) connectors |
| Proc10AX115B | Arria 10 1150 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | Without connectors |
| Proc10AX115-BS | Arria 10 1150 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+connectors |
| Proc10AX115-BF | Arria 10 1150 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+, QSFP+ and PHS connectors |
| Proc10AX027-B | Arria 10 270 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | Without connectors |
| Proc10AX027-BS | Arria 10 270 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+ connector |
| Proc10AX027-BF | Arria 10 270 GX | K3-E2 | 1 | 1 GB on-board and 2 sockets for: 0-16 GB ECC DDRIII | With 3x SFP+, QSFP+ and PHS connectors |
*For additional Proc10A models, including SoC, PoCL, 2 GB on-board, and other FPGA speed grades, please contact Gidel Sales.
Download our data sheet for the Proc 10A Acceleration System.